The phrase “approximating an ADC with successive approximation” sounds like an engineer tried to name a magic trick after drinking three cups of lab coffee. But behind the slightly circular wording is one of the most practical ideas in electronics: turning a real-world analog voltage into a digital number by making a series of smart guesses.
A successive approximation ADC, commonly called a SAR ADC, is the electronics version of playing “higher or lower?” with voltage. It does not count slowly from zero. It does not compare the signal against every possible value at once. Instead, it performs a binary search, starting with the biggest bit and working down to the smallest. The result is fast, efficient, and surprisingly elegantlike a chess player who also happens to own a soldering iron.
This article explains how a successive approximation analog-to-digital converter works, why SAR ADCs are everywhere from microcontrollers to precision data acquisition systems, and what can go wrong when the theory meets a real circuit board with noise, source impedance, reference errors, and the usual gremlins hiding in copper traces.
What Is an ADC?
An analog-to-digital converter, or ADC, converts a continuous analog signal into a digital code. In plain English, it helps a computer understand the physical world. Temperature, pressure, sound, light, battery voltage, motor current, and sensor output are usually analog quantities. A processor, however, prefers neat rows of bits. The ADC acts as the translator.
Suppose a sensor produces a voltage between 0 V and 5 V. A 10-bit ADC divides that range into 1,024 possible digital codes. A 12-bit ADC divides it into 4,096 codes. A 16-bit ADC divides it into 65,536 codes. More bits mean smaller voltage steps, but not automatically better measurements. The analog front end, reference voltage, layout, noise, and timing must all behave. Electronics is generous like that: it gives you one problem, then quietly attaches six cousins.
What Makes a SAR ADC Different?
A SAR ADC uses a successive approximation register to determine the output code one bit at a time. It is popular because it offers a strong balance of resolution, speed, power consumption, size, and cost. That is why SAR ADCs appear in microcontrollers, industrial control systems, portable instruments, medical devices, battery-powered sensors, motor drives, and general data acquisition equipment.
Compared with a flash ADC, a SAR ADC is usually much smaller and lower power. A flash ADC is extremely fast because it compares the input against many thresholds simultaneously, but it needs many comparators. Compared with a delta-sigma ADC, a SAR ADC usually has lower latency and can be easier to use when you need one clean conversion at a specific moment. Delta-sigma converters can deliver excellent resolution and noise performance, but they often rely on oversampling and digital filtering.
The SAR ADC is the practical middle child: not the fastest, not always the quietest, but dependable, efficient, and invited to almost every engineering project.
The Core Parts of a Successive Approximation ADC
A typical SAR ADC contains four essential building blocks: a sample-and-hold circuit, a comparator, a digital-to-analog converter, and the successive approximation register logic. Each part has a clear job, and if one of them misbehaves, the final code may look confident while being quietly wrong.
1. Sample-and-Hold Circuit
The sample-and-hold circuit captures the input voltage at a specific moment and holds it steady during conversion. This matters because the ADC is about to ask several comparison questions. If the input signal moves around during that process, the converter may be trying to measure a moving target. That is fun at a carnival, less fun in a precision measurement system.
2. Internal DAC
The internal DAC creates trial voltages based on the digital guesses made by the SAR logic. In many modern SAR ADCs, this DAC is implemented with a capacitive array. The ADC compares the sampled input voltage against each trial voltage, then keeps or clears bits depending on the result.
3. Comparator
The comparator decides whether the sampled input voltage is higher or lower than the DAC output. It is the referee of the conversion process. A noisy, slow, or offset-heavy comparator can degrade accuracy, especially when the ADC is resolving the smaller least significant bits.
4. Successive Approximation Register
The successive approximation register is the decision-maker. It starts with the most significant bit, tests it, and then moves downward bit by bit. By the end of the sequence, the register contains the digital approximation of the original analog voltage.
How Successive Approximation Works
The easiest way to understand a SAR ADC is to imagine guessing a number between 0 and 100. Instead of starting at 1 and counting upward like a very patient robot, you start at 50. If the target is higher, you keep the 50 and try 75. If the target is lower, you discard the 50 and try 25. Each guess cuts the remaining range in half.
A SAR ADC does the same thing with voltage and binary bits. For an N-bit ADC, it generally takes N comparison steps to decide the final code. An 8-bit SAR ADC needs eight bit decisions. A 12-bit SAR ADC needs twelve. A 16-bit SAR ADC needs sixteen. This predictable conversion process is one reason SAR converters are attractive in control systems where timing matters.
A Simple 4-Bit Example
Consider a 4-bit SAR ADC with a 0 V to 5 V input range. Four bits produce 16 possible codes, so one least significant bit, or LSB, equals 5 V divided by 16, which is 0.3125 V.
Now suppose the input voltage is 3.2 V. The ADC begins by testing the most significant bit:
- Trial code 1000 equals 2.5 V. The input is higher, so the ADC keeps the bit.
- Trial code 1100 equals 3.75 V. The input is lower, so the ADC clears that bit.
- Trial code 1010 equals 3.125 V. The input is higher, so the ADC keeps the bit.
- Trial code 1011 equals 3.4375 V. The input is lower, so the ADC clears that bit.
The final code is 1010, which represents 3.125 V in this simplified example. The ADC has not captured the infinitely exact value of 3.2 V. It has placed the input into the nearest available digital bucket according to its conversion method. That difference is not a failure; it is quantization.
Resolution, LSB Size, and Quantization Error
Resolution tells you how many digital steps the ADC can produce. The LSB size is calculated by dividing the full-scale input range by the number of possible codes. For a 12-bit ADC with a 3.3 V reference, the LSB size is approximately 3.3 V divided by 4,096, or about 0.806 mV.
Quantization error is the unavoidable difference between the real analog value and the digital code assigned to it. Even an ideal ADC has quantization uncertainty. In practice, real converters add other errors too: offset error, gain error, integral nonlinearity, differential nonlinearity, thermal noise, reference noise, and timing-related errors.
This is why “I bought a 16-bit ADC” does not automatically mean “I get 16 clean bits of useful measurement.” The effective number of bits can be lower when noise and distortion enter the party wearing steel-toed boots.
Why the Reference Voltage Matters
A SAR ADC compares the input signal against values derived from its reference voltage. If the reference is noisy, drifting, poorly bypassed, or unable to drive the ADC’s dynamic load, the conversion result suffers.
Think of the reference voltage as the ruler used by the ADC. If the ruler stretches, wiggles, or changes length with temperature, the measurements may look precise but not accurate. High-resolution SAR ADCs often need a stable voltage reference, careful decoupling, and sometimes a dedicated reference buffer.
The reference path is especially important because many SAR ADCs use switched-capacitor networks internally. During conversion, charge moves around quickly. That movement can create transient current demands on the reference. A weak reference design can turn a beautiful ADC datasheet into a mystery novel called “Where Did My Bits Go?”
Input Settling: The Hidden Boss Fight
One of the most common practical issues with SAR ADCs is input settling. During the acquisition phase, the ADC’s internal sampling capacitor must charge to the input voltage. The time required depends on source impedance, switch resistance, sampling capacitance, PCB parasitics, and the selected acquisition time.
If the signal source has high impedance, the sampling capacitor may not fully charge before conversion begins. The ADC then converts a voltage that is close to the real signal but not quite there. That “not quite” becomes a measurement error.
This is why many precision SAR ADC circuits use an op-amp driver between the signal source and the ADC input. The driver provides low output impedance, fast settling, and enough current to charge the ADC’s sampling network. Sometimes a small RC filter is placed between the driver and ADC input to reduce noise and help handle charge kickback. But the filter values must be chosen carefully, because too much resistance can make settling worse.
Conversion Time vs. Acquisition Time
SAR ADC timing usually includes an acquisition period and a conversion period. During acquisition, the sample-and-hold circuit tracks the input. During conversion, the ADC holds the sampled value and performs its bit-by-bit binary search.
Confusing these two timing windows can create design mistakes. A converter may advertise a high sample rate, but your specific source impedance and input network still need enough acquisition time. In multiplexed systems, where one ADC samples several channels, settling becomes even more important because the input may jump from one channel voltage to another. A temperature sensor at 0.5 V followed by a current sensor at 3.0 V creates a larger step than two nearly identical channels.
Good ADC design is not only about selecting the converter. It is about making sure the ADC has enough time and a clean enough signal to do the job it was already designed to do.
SAR ADCs in Microcontrollers
Many microcontrollers include built-in SAR ADCs because they are compact, efficient, and useful for general measurement tasks. These built-in ADCs are excellent for battery monitoring, knobs, basic sensors, user controls, and many embedded applications. However, they are not magic.
A microcontroller ADC still needs a proper reference, reasonable input impedance, clean grounding, and correct sampling settings. Reading an analog pin is easy. Reading it accurately is the part that separates a working prototype from a product that behaves differently every Tuesday.
For low-speed sensors, the internal ADC may be perfectly adequate. For precision instrumentation, high-speed acquisition, low-noise measurement, or synchronized sampling, an external SAR ADC may be the better choice.
SAR ADC vs. Delta-Sigma ADC
SAR and delta-sigma ADCs are both extremely useful, but they shine in different jobs. A SAR ADC is often chosen when the system needs low latency, moderate to high resolution, predictable timing, and efficient power use. It is well suited for control loops, multiplexed sensors, and applications where individual samples matter.
A delta-sigma ADC is often chosen when very high resolution and excellent noise performance are more important than immediate conversion results. It oversamples the signal and uses digital filtering, which can improve noise performance but may add latency. This makes delta-sigma ADCs popular in weigh scales, precision temperature measurement, audio, and slow high-resolution instrumentation.
Neither architecture is “better” in every case. The right question is not “Which ADC is best?” The right question is “Which ADC best matches the signal, speed, accuracy, power budget, and firmware timing of this design?”
Common Mistakes When Using Successive Approximation ADCs
Using Too Much Source Impedance
A high-value resistor divider may save battery current, but it can also slow the charging of the ADC sampling capacitor. The result may be a reading that is repeatable, believable, and wrongthe most dangerous kind of wrong.
Ignoring the Reference Pin
The ADC reference is not a decorative accessory. It is the scale against which every input is measured. Poor bypassing, noisy supply rails, and weak reference drive can all damage accuracy.
Sampling Too Fast
Fast sampling looks great in firmware settings until the analog input cannot settle in time. Slowing down the sampling rate or increasing acquisition time can improve accuracy dramatically.
Forgetting PCB Layout
Long traces, poor grounding, noisy digital lines near analog inputs, and careless return paths can all reduce performance. Mixed-signal layout is not glamorous, but neither is debugging random LSB noise at midnight.
Expecting Datasheet Perfection Automatically
ADC datasheets are written under controlled test conditions. Your board has connectors, sensors, regulators, firmware interrupts, switching converters, ground currents, and maybe a motor nearby making electrical jazz. Real performance depends on the whole signal chain.
Design Tips for Better SAR ADC Results
Start by matching the ADC input range to the signal range. If your sensor only uses a tiny part of the ADC range, you waste resolution. A gain stage or different reference voltage may improve useful measurement detail.
Keep the source impedance low enough for the chosen sampling speed. If the source cannot drive the ADC input directly, use an appropriate op-amp buffer or ADC driver. Check that the amplifier can settle within the required time and remain stable with the input filter and sampling load.
Use a clean reference and follow the converter manufacturer’s bypassing recommendations. Place decoupling capacitors close to the ADC pins. Separate noisy digital currents from sensitive analog paths where practical. Use short traces for reference and input nodes.
In firmware, discard the first sample after switching ADC channels if the system shows settling problems. Increase acquisition time when measuring high-impedance sources. Average multiple samples when the signal bandwidth allows it, but remember that averaging cannot fix every problem. It helps with random noise, not a broken reference or a capacitor that never charges properly.
A Practical Example: Reading a Battery Divider
Imagine a microcontroller measuring a battery through a resistor divider. To save power, the designer chooses very large resistor values. The divider output is connected directly to the MCU’s SAR ADC input. The firmware samples quickly because the datasheet says the ADC can run fast. The first readings look low, and the readings change depending on what channel was measured before.
The problem is not that the ADC is bad. The issue is that the high source impedance cannot charge the internal sampling capacitor quickly enough. Possible fixes include lowering the divider resistance, adding a capacitor at the ADC input, increasing acquisition time, enabling the divider only before measurement and waiting for it to settle, or adding a buffer amplifier.
This example is common because it sits at the intersection of analog design and firmware assumptions. The code says “read ADC.” The circuit says “give me a moment.” The correct design listens to both.
Field Experience: Approximating an ADC With Successive Approximation in Real Projects
The first time many engineers meet a SAR ADC, it seems almost too friendly. Configure a register, select a channel, start conversion, read the result. The numbers appear. The graph moves. Everyone smiles. Then the project moves from a quiet bench supply to a real product enclosure, and suddenly the readings develop a personality.
A common experience is watching ADC values drift when a nearby load turns on. A motor starts, a relay clicks, a switching regulator changes duty cycle, and the analog measurement jumps by several counts. At first, firmware gets blamed. Then the sensor gets blamed. Eventually, the layout confesses. The ADC was faithfully reporting what it saw; the board was feeding it noise through ground paths, supply ripple, or reference movement.
Another practical lesson is that the first conversion after a channel change can be suspicious. In a multiplexed SAR ADC system, the sampling capacitor may still carry memory from the previous channel. If the previous channel was near full scale and the next channel is near ground, the input network must settle across a large voltage step. A quick fix is to discard the first reading after switching channels. A better fix is to design the analog source impedance and acquisition time correctly. The best fix is usually both, because engineering likes belts and suspenders.
In battery-powered designs, the tension between low current and accurate ADC readings shows up constantly. Large resistor dividers reduce wasted current, but large resistor values raise source impedance. One useful technique is to switch the divider on only when needed, wait for the node to settle, take several readings, then switch it off again. Another is to place a small capacitor at the ADC input so the sampling capacitor can draw charge locally. The capacitor must be sized carefully, though, because it also creates a settling delay when the divider is enabled.
Experience also teaches respect for the voltage reference. Beginners often assume the supply rail is “good enough.” Sometimes it is. Often it is not. If the ADC reference is tied to a noisy supply, the digital reading can move even when the input signal is stable. In ratiometric sensor systems, using the same supply for the sensor and ADC reference can cancel some errors. In precision systems, a dedicated reference can be worth every cent.
Finally, successful SAR ADC design rewards measurement habits. Probe the input pin, not just the sensor output. Check the reference under conversion activity. Compare slow sampling against fast sampling. Test with worst-case channel order. Look at raw codes before filtering them into polite averages. A moving average can make bad data look calm, but it cannot turn an unsettled sample into truth.
The best lesson is simple: a successive approximation ADC is not merely a digital block with an analog pin. It is a small mixed-signal system. Treat the input, reference, timing, layout, and firmware as one signal chain, and the SAR ADC becomes a precise, predictable tool. Ignore those details, and it becomes a tiny fortune teller with a 12-bit vocabulary.
Conclusion
A successive approximation ADC converts analog voltage into digital data by narrowing the answer one bit at a time. Its binary-search method makes it efficient, predictable, and widely useful. That is why SAR ADCs remain a favorite architecture in embedded systems, industrial electronics, portable instruments, and precision data acquisition.
The concept is beautifully simple: sample the input, compare it to a DAC-generated trial voltage, keep or clear each bit, and repeat until the final code is ready. The practice is more demanding. Input settling, reference quality, source impedance, noise, timing, and PCB layout all influence the result.
If you remember one thing, remember this: the SAR ADC approximates the input, but your design determines whether that approximation is useful. Give it a stable signal, a clean reference, enough acquisition time, and a sensible layout, and it will reward you with reliable data. Treat it like a magic number box, and it may still give you numbersjust not the ones you wanted.
